/**
 * @copyright 2018 indie Semiconductor
 *
 * This file is proprietary to indie Semiconductor.
 * All rights reserved. Reproduction or distribution, in whole
 * or in part, is forbidden except by express written permission
 * of indie Semiconductor.
 *
 * @file crga_sfr.h
 */

#ifndef __CRGA_SFR_H__
#define __CRGA_SFR_H__

#include <stdint.h>

/* -------  Start of section using anonymous unions and disabling warnings  ------- */
#if   defined (__CC_ARM)
  #pragma push
  #pragma anon_unions
#elif defined (__ICCARM__)
  #pragma language=extended
#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
  #pragma clang diagnostic push
  #pragma clang diagnostic ignored "-Wc11-extensions"
  #pragma clang diagnostic ignored "-Wreserved-id-macro"
#elif defined (__GNUC__)
  /* anonymous unions are enabled by default */
#elif defined (__TMS470__)
  /* anonymous unions are enabled by default */
#elif defined (__TASKING__)
  #pragma warning 586
#elif defined (__CSMC__)
  /* anonymous unions are enabled by default */
#else
  #warning Not supported compiler type
#endif


typedef struct {
      uint32_t WDTACTION:  1;
      uint32_t          : 31; /*    (reserved) */
}WDTACTION_t;
/**
 * @brief A structure to represent Special Function Registers for CRGA.
 */
typedef struct {

  uint8_t  LFRCSTS;                           /*<! Slow oscillator status +0x000 */
  uint8_t  _RESERVED_01[3];                   /* +0x001 */

  union {
    struct {
      uint8_t  HFRCENA                  :  1; /*!< Fast oscillator enable */
      uint8_t  HFRCSTS                  :  1; /*!< Fast oscillator status */
      uint8_t                           :  6; /*   (reserved) */
      uint8_t  SYSCLKSEL                :  8; /*!< Clock select */
      uint8_t  DIVSYSCLK                :  8; /*!< Clock div select */
      uint8_t                           :  8; /*   (reserved) */
    };
    uint32_t WORD;
  } SYSCLKCTRL; /* +0x004 */

  union {
    struct {
      uint8_t  PORFLAG                  :  1; /*!< Power on reset flag */
      uint8_t                           :  1; /*   (reserved) */
      uint8_t  BOR3V3FLAG               :  1; /*!< BOR 3v3 flag */
      uint8_t  BOR2V6FLAG               :  1; /*!< BOR 2v6 flag */
      uint8_t  BOR1V8FLAG               :  1; /*!< BOR 1v8 flag */
      uint8_t  WDTFLAG                  :  1; /*!< Watchdog bark flag */
      uint8_t                           :  2; /*   (reserved) */
      uint8_t  PORFLAGCLR               :  1; /*!< POR flag clear */
      uint8_t                           :  1; /*   (reserved) */
      uint8_t  BOR3V3FLAGCLR            :  1; /*!< BOR 3v3 clear */
      uint8_t  BOR2V6FLAGCLR            :  1; /*!< BOR 2v6 clear */
      uint8_t  BOR1V8FLAGCLR            :  1; /*!< BOR 1v8 clear */
      uint8_t  WDTFLAGCLR               :  1; /*!< WDT flag clear */
      uint8_t                           :  2; /*   (reserved) */
      uint8_t  HARDRSTREQ               :  8; /*!< Hard reset request */
      uint8_t  SOFTRSTREQ               :  8; /*!< Soft reset request */
    };
    uint32_t WORD;
  } RESETCTRL; /* +0x008 */

  union {
    struct {
      uint8_t  VDD3V3                   :  2; /*!< BOR 3v3 action */
      uint8_t  VDD2V6                   :  2; /*!< BOR 2v6 action */
      uint8_t  VDD1V8                   :  2; /*!< BOR 1v8 action */
      uint8_t                           :  2; /*   (reserved) */
      uint32_t                          : 24; /*   (reserved) */
    };
    uint32_t WORD;
  } BORACTION; /* +0x00C */

  union {
    struct {
      uint8_t  BOR3V3THRESH             :  8; /*!< BOR 3v3 threshold */
      uint8_t  BOR2V6THRESH             :  8; /*!< BOR 2v6 threshold */
      uint8_t  BOR1V8THRESH             :  8; /*!< BOR 1v8 threshold */
      uint8_t  BORBIASOVERRIDEENA       :  1; /*!< BOR bias override bit */
      uint8_t                           :  3; /*   (reserved) */
      uint8_t  BORBIASOVERRIDESEL       :  1; /*!< BOR bias override select */
      uint8_t                           :  3; /*   (reserved) */
    };
    uint32_t WORD;
  } BORCONFIG; /* +0x010 */

  WDTACTION_t   WDTACTION;
//  uint8_t  WDTACTION;                         /*<! Watchdog action +0x014 */
//  uint8_t  _RESERVED_15[3];                   /* +0x015 */

  uint8_t  KILLLFRC;                          /*<! Kill slow RC oscillator +0x018 */
  uint8_t  _RESERVED_19[3];                   /* +0x019 */

  union {
    struct {
      uint8_t  PMUCPSEL                 :  1; /*!< PMU charge pump select */
      uint8_t  PMUCPREG                 :  1; /*!< PMU charge pump override register */
      uint8_t                           :  2; /*   (reserved) */
      uint8_t  PMUCPDIVSEL              :  3; /*!< PMU charge pump divider select */
      uint8_t                           :  1; /*   (reserved) */
      uint32_t                          : 24; /*   (reserved) */
    };
    uint32_t WORD;
  } CPCLKCTRL; /* +0x01C */

} CRGA_SFRS_t;

/* --------  End of section using anonymous unions and disabling warnings  -------- */
#if   defined (__CC_ARM)
  #pragma pop
#elif defined (__ICCARM__)
  /* leave anonymous unions enabled */
#elif (__ARMCC_VERSION >= 6010050)
  #pragma clang diagnostic pop
#elif defined (__GNUC__)
  /* anonymous unions are enabled by default */
#elif defined (__TMS470__)
  /* anonymous unions are enabled by default */
#elif defined (__TASKING__)
  #pragma warning restore
#elif defined (__CSMC__)
  /* anonymous unions are enabled by default */
#else
  #warning Not supported compiler type
#endif

/**
 * @brief The starting address of CRGA SFRS.
 */
#define CRGA_SFRS ((__IO CRGA_SFRS_t *)0x50000000)

#endif /* end of __CRGA_SFR_H__ section */


